[阅读: 556] 2005-11-22 08:33:59
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-- VHDL Johnson_Counter
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Library IEEE;
Use IEEE.std_logic_1164.all;
Entity Johnson_Counter Is
port
(
CLK : In STD_LOGIC;
LEFT : In STD_LOGIC;
LOAD : In STD_LOGIC;
Q : Out STD_LOGIC_VECTOR(3 downto 0);
RIGHT : In STD_LOGIC;
STOP : In STD_LOGIC
);
attribute MacroCell : boolean;
attribute PARA_NAME : string;
attribute PARA_NAME of Johnson_Counter : Entity is "2S200-PQ208-5";
attribute PINNUM : string;
attribute PINNUM of CLK : Signal is "P6";
attribute PINNUM of LEFT : Signal is "P3";
attribute PINNUM of LOAD : Signal is "P7";
attribute PINNUM of Q : Signal is "P15,P16,P17,P18";
attribute PINNUM of RIGHT : Signal is "P4";
attribute PINNUM of STOP : Signal is "P5";
attribute Xilinx_bufg : boolean;
attribute Xilinx_bufg of CLK : Signal is true;
End Johnson_Counter;
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architecture structure of Johnson_Counter is
Component FJKC
port
(
C : in STD_LOGIC;
CLR : in STD_LOGIC;
J : in STD_LOGIC;
K : in STD_LOGIC;
Q : out STD_LOGIC
);
End Component;
Component INV
port
(
I : in STD_LOGIC;
O : out STD_LOGIC
);
End Component;
Component OR2B2
port
(
I0 : in STD_LOGIC;
I1 : in STD_LOGIC;
O : out STD_LOGIC
);
End Component;
Component SR4CLED
port
(
C : in STD_LOGIC;
CE : in STD_LOGIC;
CLR : in STD_LOGIC;
D0 : in STD_LOGIC;
D1 : in STD_LOGIC;
D2 : in STD_LOGIC;
D3 : in STD_LOGIC;
L : in STD_LOGIC;
LEFT : in STD_LOGIC;
Q0 : out STD_LOGIC;
Q1 : out STD_LOGIC;
Q2 : out STD_LOGIC;
Q3 : out STD_LOGIC;
SLI : in STD_LOGIC;
SRI : in STD_LOGIC
);
End Component;
Signal NamedSignal_SQ : STD_LOGIC_VECTOR(3 downto 0); -- ObjectKind=Net|PrimaryId=Q[3..0]
Signal PinSignal_U1_O : STD_LOGIC; -- ObjectKind=Net|PrimaryId=SSLI
Signal PinSignal_U2_O : STD_LOGIC; -- ObjectKind=Net|PrimaryId=S03
Signal PinSignal_U3_O : STD_LOGIC; -- ObjectKind=Net|PrimaryId=S02
Signal PinSignal_U4_O : STD_LOGIC; -- ObjectKind=Net|PrimaryId=SSRI
Signal PinSignal_U5_O : STD_LOGIC; -- ObjectKind=Net|PrimaryId=S04
Signal PinSignal_U6_Q0 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Q0
Signal PinSignal_U6_Q1 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Q1
Signal PinSignal_U6_Q2 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Q2
Signal PinSignal_U6_Q3 : STD_LOGIC; -- ObjectKind=Net|PrimaryId=Q3
Signal PinSignal_U7_O : STD_LOGIC; -- ObjectKind=Net|PrimaryId=S01
Signal PinSignal_U8_Q : STD_LOGIC; -- ObjectKind=Net|PrimaryId=NetU6_LEFT
Signal PinSignal_U9_Q : STD_LOGIC; -- ObjectKind=Net|PrimaryId=SCE
Signal PowerSignal_GND : STD_LOGIC; -- ObjectKind=Net|PrimaryId=SGND
attribute Datasheet : string;
attribute Datasheet of FJKC : Component is "Latest Revision: 1999";
attribute Datasheet of INV : Component is "Latest Revision: 1999";
attribute Datasheet of OR2B2 : Component is "Latest Revision: 1999";
attribute Datasheet of SR4CLED : Component is "Latest Revision: 1999";
begin
U9 : FJKC
Port Map
(
C => CLK,
CLR => PowerSignal_GND,
J => PinSignal_U7_O,
K => PinSignal_U3_O,
Q => PinSignal_U9_Q
);
U8 : FJKC
Port Map
(
C => CLK,
CLR => PowerSignal_GND,
J => PinSignal_U2_O,
K => PinSignal_U5_O,
Q => PinSignal_U8_Q
);
U7 : OR2B2
Port Map
(
I0 => RIGHT,
I1 => LEFT,
O => PinSignal_U7_O
);
U6 : SR4CLED
Port Map
(
C => CLK,
CE => PinSignal_U9_Q,
CLR => PowerSignal_GND,
D0 => PowerSignal_GND,
D1 => PowerSignal_GND,
D2 => PowerSignal_GND,
D3 => PowerSignal_GND,
L => LOAD,
LEFT => PinSignal_U8_Q,
Q0 => PinSignal_U6_Q0,
Q1 => PinSignal_U6_Q1,
Q2 => PinSignal_U6_Q2,
Q3 => PinSignal_U6_Q3,
SLI => PinSignal_U1_O,
SRI => PinSignal_U4_O
);
U5 : INV
Port Map
(
I => LEFT,
O => PinSignal_U5_O
);
U4 : INV
Port Map
(
I => PinSignal_U6_Q0,
O => PinSignal_U4_O
);
U3 : INV
Port Map
(
I => STOP,
O => PinSignal_U3_O
);
U2 : INV
Port Map
(
I => RIGHT,
O => PinSignal_U2_O
);
U1 : INV
Port Map
(
I => PinSignal_U6_Q3,
O => PinSignal_U1_O
);
-- Signal Assignments
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NamedSignal_SQ(0) <= PinSignal_U6_Q0; -- ObjectKind=Net|PrimaryId=Q0
NamedSignal_SQ(1) <= PinSignal_U6_Q1; -- ObjectKind=Net|PrimaryId=Q1
NamedSignal_SQ(2) <= PinSignal_U6_Q2; -- ObjectKind=Net|PrimaryId=Q2
NamedSignal_SQ(3) <= PinSignal_U6_Q3; -- ObjectKind=Net|PrimaryId=Q3
PowerSignal_GND <= '0'; -- ObjectKind=Net|PrimaryId=SGND
Q <= NamedSignal_SQ; -- ObjectKind=Net|PrimaryId=Q[3..0]
end structure;
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